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Description: ALTERA sdram
vhdl与verilog参考设计-Altera SDRAM VHDL and Verilog reference design
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Size: 2458624 |
Author: 陈东平 |
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Description: 用VHDL编写的由FPGA控制SDRAM的存储控制程序-VHDL prepared by the FPGA control SDRAM memory control procedures
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Size: 1024 |
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Description: sdram的vhdl实现
本文介绍了sdram的控制时序特征,并介绍了采用vhdl语言实现的sdram控制器的关键技术-SDRAM This paper introduces the realization of SDRAM timing control features, and introduces the VHDL language SDRAM controller of the key technologies
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Size: 84992 |
Author: cxr |
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Description: ddr_sdram控制器的vhdl代码,里面的地址和数据长度可配置,能满足不同用户的需要.-ddr_sdram controller vhdl code, which addresses and the data length can be configured, meet the needs of different users.
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Size: 13312 |
Author: hxwf801 |
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Description: 这是我从网上找到的用vhdl语言写的sdram控制器的代码。我的邮箱:wleechina@163.com-This is what I found online vhdl language used to write the sdram controller code. My mail : wleechina@163.com
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Size: 339968 |
Author: 李伟 |
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Description: lattice sdram 控制器的源码,VHDL语言编码
包括仿真文件-lattice sdram controller source code, including VHDL simulation document coding
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Size: 31744 |
Author: dido wang |
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Description: 现代的4bank*1M*16bit的SDRAM(HY57V6416ET)的VHDL行为仿真程序-modern 4bank 1M** 16bit of SDRAM (HY57V6416ET) VHDL simulation program acts
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Size: 14336 |
Author: 王森 |
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Description: 视频采集并锁存到SDRAM中的完整代码,运行环境为QII,VHDL与标准参数宏模块调用混合设计 是学习视频采集的很好的参考-Video Capture SDRAM and latches to the integrity code, the operating environment for QII. VHDL standard parameter-called hybrid module is designed to study the Video Capture good reference
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Size: 4133888 |
Author: 刘留 |
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Description: 在信息处理中,特别是实时视频图像处理中,通常都要对实现视频图像进行处理,而这首先必须设计大容量的存储器,同步动态随机存储器SDRAM虽然有价格低廉、容量大等优点,但因SDRAM的控制结构复杂,常用的方法是设计SDRAM通用控制器,这使得很多人不得不放弃使用SDRAM而使用价格昂贵的SRAM。为此,笔者在研究有关文献的基础上,根据具体情况提出一种独特的方法,实现了对SDRAM的控制,并通过利用FPGA控制数据存取的顺序来实现对数字视频图像的旋转,截取、平移等实时处理。-In information processing, especially real-time video image processing usually have to deal with video images, which must first be designed large-capacity memory, synchronous dynamic random access memory SDRAM Although there are low cost, large capacity, etc., but SDRAM control structure of the complex, commonly used method is to design generic SDRAM controller, which makes a lot of people had to abandon the use of SDRAM and the use of expensive SRAM. To this end, the authors examine the literature based on the specific situation in a unique way to realize the control of SDRAM, and control data through the use of FPGA to realize the order of access to digital video image rotation, interception, translation, such as real-time processing.
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Size: 137216 |
Author: 赵明玺 |
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Description: sdram操作的vhdl源代码,对自己编写SDRAM核有很好的参考意义-SDRAM operation of VHDL source code, the preparation of their own nuclear SDRAM have a good reference value
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Size: 2048 |
Author: 宋军 |
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Description: SDRAM控制IP核的VHDL语言源代码,需要的开发环境是QUARTUS II 6.0。-SDRAM control IP core VHDL language source code, the need for the development environment is QUARTUS II 6.0.
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Size: 88064 |
Author: 周华茂 |
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Description: SDRAM控制器的设计与VHDL实现
是pdf格式的。在工程中实现过-SDRAM Controller Design with VHDL realize is pdf format. In the projects implemented
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Size: 138240 |
Author: hjx |
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Description: 同步动态RAM的控制电路VHDL源代码,在SOC开发中可以直接应用-Synchronous Dynamic RAM control circuit VHDL source code, in the SOC development can be applied directly
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Size: 90112 |
Author: 26 |
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Description: 基于FPGA 实现DDR SDRAM的控制器-FPGA-based realization of DDR SDRAM controller
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Size: 474112 |
Author: 张宁 |
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Description: sdram控制器的开发程序,还有文档,可以参考以下-SDRAM controller development process, there is a document, you can refer to the following
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Size: 776192 |
Author: 王鹏 |
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Description: SDRAM的控制器的VHDL语言编写代码
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Size: 50176 |
Author: 张彦 |
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Description: 标准SDR SDRAM控制器参考设计_verilog_lattice\sdr_ctrl.v-Standard SDR SDRAM Controller Reference Design _verilog_latticesdr_ctrl.v
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Size: 776192 |
Author: 王廷龙 |
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Description: 标准SDR SDRAM控制器参考设计,有助于大家学习和参考-Standard SDR SDRAM controller reference design will help everyone to learn and reference
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Size: 205824 |
Author: 王廷龙 |
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Description: SDRAM的 详细构造,工作原理,控制说明-SDRAM detailed structure, working principle, control description
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Size: 859136 |
Author: li ji wei |
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Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。-CPLD control 8-32M sdram controller maxII epm570 realize.
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Size: 433152 |
Author: 王可见 |
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